Naveen Kadayinti

Office: A1-342,

Academic block I,

IIT Dharwad,

email: naveen@iitdh.ac.in

Phone: 0836 2309686

Intercom: 1038

I am an associate professor in the department of Electrical, Electronics and Communication Engineering of the Indian Institute of Technology Dharwad. My primary research interests are in mixed signal integrated circuits design and electronics system design. Our group works on broadband filters, data converters and interface circuits for MEMS sensors. We also have some active ongoing work on hearing aid design.

Academic background and Experience

I obtained my M.Tech + Ph.D. dual degree from Dept. of Electrical Engineering at Indian Institute of Technology Bombay in 2017. I worked on low swing on-chip interconnects under the guidance of Prof. Dinesh Sharma and Prof. Maryam Shojaei Baghini. You can read the abstract of my Ph.D work here. I obtained a Bachelor’s degree in Electronics and Telecommunications from Padre Conceicao College of Engineering, Goa in the year 2008. After my Ph.D., I had a short stint as a Post-doctoral fellow with Prof. Nagendra Krishnapura in the Department of Electrical Engineering of the Indian Institute of Technology Madras. I was a visiting faculty member in the department of Avionics at Indian Institute of Space Science and Technology, Trivandrum during Spring 2017-18.

News

Jun 18, 2026	Avinash Maurya successfully defended his MS thesis. His thesis was titled “Suspended Gate Field Effect Transistor : AC Analysis and Noise Modeling using Look-Up Tables”. Congratulations Avinash! You can watch the defence presentation here.
Apr 29, 2026	Pavan Kumar K M successfully defended his MS thesis. His thesis was titled “A Variable OSR $\Delta\Sigma$ ADC using LSB-First SAR ADC as Quantizer”. Congratulations Pavan! You can watch the defence presentation here.
Apr 24, 2026	Mayank Aggarwal successfully defended his MS thesis. His thesis was titled “High Gain OTA with In-Line Negative Transconductance Load and its Applications”. Congratulations Mayank! You can watch the defence presentation here.

News archive

Selected publications

ArXiv
A High Input Impedance Chopper Stabilized Amplifier Based On Charge Conservation

Prabhas K Deshpande and Naveen Kadayinti

2026

About this paper arXiv Bib

Chopper stabilized amplifiers are popularly used for realizing amplifiers with low offset and for rejecting flicker noise. One of the main limitations of these amplifiers is the low Input Impedance (Zin) produced by the switch capacitor input network. Zin here is resistive due to the switch capacitor action and is inversely proportional to the product of Chopping frequency (Fch) and Input Capacitance (Ci). Since Fch should be greater than the flicker noise corner frequency, this results in a low Zin. When interfacing sensors with high Sensor Output Impedance (Zo), chopper stabilized amplifiers load the sensors resulting in reduced sensitivity. This paper presents a novel input impedance boosting technique – Differential capacitor flipping technique for chopper based Capacitively Coupled Instrumentation Amplifier (CCIA), which prevents discharge and recharge of Ci’s in every cycle by reconfiguring the capacitor positions while preserving the chopping operation. This ideally results in a purely capacitive Zin which is independent of Fch.
@misc{prabhas-highZchooper-preprint, title = {A High Input Impedance Chopper Stabilized Amplifier Based On Charge Conservation}, author = {Deshpande, Prabhas K and Kadayinti, Naveen}, year = {2026}, eprint = {2606.13129}, archiveprefix = {arXiv}, primaryclass = {eess.SP}, url = {https://arxiv.org/abs/2606.13129}, }
Microwave Magazine
A Review of True Time Delay-Based Beamforming and Analysis of Some Practical Implications

Mayur S. Marinaik and Naveen Kadayinti

IEEE Microwave Magazine, 2025

About this paper DOI Bib Website

True time delay (TTD) elements have been explored over phase shifters in wideband beamforming applications to overcome the effect of beam-squint. This paper reviews different true time delay architectures reported in literature. The paper then discusses non-ideal effects of TTD circuits on beam-pattern of timed antenna array receivers. This helps in understanding the inevitable beam-squints associated with practical TTDs. The paper then discusses quantification of these non-idealities which would help in designing good variable delay lines for TTD based beamforming.
@article{Mayur_uwavemag, author = {Marinaik, Mayur S. and Kadayinti, Naveen}, journal = {IEEE Microwave Magazine}, title = {A Review of True Time Delay-Based Beamforming and Analysis of Some Practical Implications}, year = {2025}, volume = {26}, number = {10}, pages = {49-64}, doi = {10.1109/MMM.2024.3517545}, }
IEEE Sensors
A Closed-Loop In-Plane Movable Suspended Gate FET (CLIP-SGFET) Sensor With a Dynamically Reconfigurable Charge Pump

Pramod Martha, K. M. Ganga, Anju Sebastian, V. Seena, and Naveen Kadayinti

IEEE Sensors Journal, 2022

About this paper DOI Bib Website

In this paper, we discuss the device, circuit and system design of a closed loop accelerometer sensor using an in-plane movable suspended gate FET. The paper is comprehensive and discusses device architecture, simulation methods adopted (we use the Look-up-table method we reported in paper 9 below), circuit design for the sensor, and a suggested fabrication plan for the sensor. Interface circuits involve novel re-configurable charge pumps for driving actuators in closed loop operation. We use fully differential architecture which requires two charge pumps for generating differential actuator drive along with a high voltage common mode feedback circuit. All circuits are designed in a standard low voltage CMOS process.
@article{pramod_sesors22, author = {Martha, Pramod and Ganga, K. M. and Sebastian, Anju and Seena, V. and Kadayinti, Naveen}, journal = {IEEE Sensors Journal}, title = {A Closed-Loop In-Plane Movable Suspended Gate FET (CLIP-SGFET) Sensor With a Dynamically Reconfigurable Charge Pump}, year = {2022}, volume = {22}, number = {22}, pages = {21550-21560}, doi = {10.1109/JSEN.2022.3210646}, }